Tutorial by University of Athens at ACM/IEEE MICRO 2018

The University of Athens (UoA) partner in the UniServer project will present a tutorial on Sunday 21 October at the ACM/IEEE MICRO 2018 symposium (ACM/IEEE International Symposium on Microarchitecture) which is taking place in Fukuoka, Japan. More details about the symposium are at this link ….

The title of the tutorial is: Energy Efficient Computing in Multicore CPUs: Design Margins and Variability. Read more at this link ….

The presentation will explain the main challenges of the massive process of characterization and identification of the design margins. The focus will be ARMv8 multicore CPUs (X-Gene 2 and X-Gene 3 of AppliedMicro – now Ampere Computing) voltage margins and variability characterization and corresponding energy savings.

Furthermore, the presenters will discuss accurate and fast margins characterization, system services to expose the hardware behavior to software layers, and modeling in simulators. More details for the contents of the tutorial can be
found here.

Paper from University of Athens at ICCD 2018

The University of Athens (UoA), a partner in the UniServer project, reports that they have had a paper accepted at the IEEE ICCD 2018 symposium (IEEE International Conference on Computer Design) which is taking place in Orlando, FL, USA.

The title of the paper is: Analysis and Characterization of Ultra Low Power Branch Predictors). Authors are A.Chatzidimitriou, G.Papadimitriou, D.Gizopoulos (University of Athens) and S.Ganapathy, J.Kalamatianos (AMD Research).

The paper discusses the performance implications and corresponding energy and power savings when SRAM arrays of modern branch predictors in CPUs are operating at reduced voltage levels.

UniServer tutorial at ACM/IEEE ISCA 2018

The University of Athens partner in the UniServer project will present are a tutorial on Sunday 3rd June
at the conference ACM/IEEE ISCA 2018 which is taking place in Los Angeles, California, USA.

The title of the tutorial is

Energy Efficient Computing in Multicore CPUs: Design Margins and Variability

The presentation will explain the main challenges of the massive process of characterization and
identification of the design margins. The focus will be on the ARMv8 multicore CPUs (X-Gene 2 and X-Gene 3 of
AppliedMicro) voltage margins and variability characterization and corresponding energy savings.

Furthermore, the presenters will discuss accurate and fast margins characterization, system services
to expose the hardware behavior to software layers, and modeling in simulators. More details of the contents
of the tutorial can be found at this link.

UniServer at ISPASS 2018

UniServer’s coordinating partner, Queen’s University and its Global ECIT Research Institute organised
 
    the International Symposium on Performance Analysis of Systems and Software (ISPASS)
 
in Belfast, U.K. from 2 to 4 April 2018.

ISPASS provides a forum for sharing advanced academic and industrial research work focused on performance
analysis in the design of computer systems and software.

A paper on UniServer’s work focusing on micro-viruses for voltage-margins characterisation was presented at
the conference. The paper title is
 
Micro-Viruses for Fast System-Level Voltage Margins Characterization in Multicore CPUs
 
The paper is authored by University of Athens’ George Papadimitriou, Athanasios Chatzidimitriou,
Manolis Kaliorakis, Yannos Vastakis, and Dimitris Gizopoulos. It shows how targeted micro-viruses
can be effectively employed to identify core-to-core and chip-to-chip Vmin variations in orders of
magnitude shorter time compared to exhaustive regular benchmarks based characterization.

UniServer at DATE 2018

The latest results of the UniServer project activities were presented in the
 
    International Design Automation and Test in Europe (DATE) conference
 
that took place in Dresden, Germany. DATE is the main European event for designers,
design automation users and researchers.

UniServer research featured at World Cyber Security Research Summit

Research output generated by the UniServer project was presented in the
World Cyber Security Research Summit 2018 held at the Centre for Secure
Information Technology (CSIT)
at Queen’s University Belfast.

The presentation attracted a great deal of interest from representatives of both
academic and industrial organizations present at the event.

CSIT is the UK’s Innovation and Knowledge Centre (IKC) for cyber security, where
research groups are developing novel technologies for key areas:

  • Device authentication
     
  • Secure ubiquitous networking
     
  • Security analytics and autonomous sensor security
     
Photograph of UniServer demo

Fourth Plenary Meeting successful

The UniServer team recently completed their fourth plenary meeting, held over two days
at the University Polytechnic Catalonia in Barcelona Spain.

       
Building
   
UPC Campus
       

Intense discussions concluded that the project is on target to meet all its deliverables.
Several publications will appear in the near future, reflecting the two productive years of
research now completed in the project lifecycle.

UniServer paper receives award

Uniserver’s work on Voltage Noise Sensing received a Best of IEEE Computer Architecture Letters Award for 2017.
Computer Architecture Letters (CAL) is one of the top Computer Architecture publication venues and the award
is given annually to the top three papers selected by the CAL editorial board.

The details of the joint work between UniServer’s partners, University of Cyprus and ARM appear in the paper

Sensing CPU Voltage Noise through Electromagnetic Emanations

which is coauthored by Zacharias Hadjilambrou, Shidhartha Das, Marco Antoniades and Yiannakis Sazeides.
The paper, which can be read at this link was invited and presented at the 24th IEEE International Symposium on High-Performance Computer Architecture (HPCA 2018) conference on February 27, 2018.

UniServer at Smart City Expo

The UniServer project participated in the recent Smart City Expo World Congress in Barcelona, the world leading event for the emerging smart cities. Project partner WorldSensing showcased the project ideas and potential impact through presentations, promotional material and a video: https://youtu.be/Jb0hXTfo_AU

Latest X-Gene-2 CPU characterisation

UniServer partner, University of Athens presented in the top tier IEEE/ACM International Symposium on Microarchitecture (MICRO 2017), the CPU characterisation results on the X-Gene2 platform.

The paper is entitled Harnessing Voltage Margins for Energy Efficiency in Multicore CPUs
and you can read about these exciting results by following the link here ….

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